周立功DP_51S开发板下的时钟读写，并把读到的内容发到串口上的程序...

德国人四旋翼导航板0.24全部的程序，是德国人开发的无人机平台程序的源码，国内最初的无人机开发爱好者都是参考这套源代码，进而开发自己的无人机，本套程序实现了，导航，PID控制，卡尔曼滤波，以及四元数算法程序。

本程序是基于STM32F10x系列开发板的VS1003测试用例，用于测试MP3播放功能。当VS1003的正弦测试完后，可以进行此项测试。工程文件是IAR，IAR 5.5及以上版本可用。

嵌入式操作链表的模版,有注释和说明 对需要解决数据链表的朋友可以参考-Embedded template operating list, have comments and information on the need to address data list can refer to a friend

这段代码是 llpc2148 板及其测量距离和显示它液晶显示器。maxbotix 超声波传感器是在这里用作计算距离。

AT91RM9200的DS1307 RTC 测试代码，仅供学习（ADS1.2)-AT91RM9200 the DS1307 RTC test code, only to learn (ADS1.2)

WSN仿真一例假定节点0（node[0]）周期性广播消息其它节点接收到消息并转发出去-Sensor Simulation case assumptions 0 nodes (node [0]) cyclical broadcasting news other nodes to cancel the reception Interest and transmitted out

资源描述程序使用说明： SD卡读写操作试验，默认为1G SD卡 串口波特率：19200  按OK    开始读写 按ESC   停止读写 使用步骤： 1.格式化SD卡，文件系统最好用FAT(不是FAT32)； 2.在电脑上建立一个LONGQIU0.TXT文件； 3.将文件的内容反复复制，大小为所需存储大小，最好大于1M字节； 4.讲给文件复制到SD卡； 5.将SD卡插入开发板SD卡插槽； 6.上电后数据自动保存； 7.数据采集完毕后关闭开发板电源，取出SD卡； 8.将SD卡插入电脑，拷贝LONGQIU0.TXT文件到电脑上； 9.复制LONGQIU0.TXT文件中相应的内容到一个新建的WORD文档中，可见相应格式很有规律； 10.重新复制WORD中的有用内容到任意TXT文档中保存和处理即可。

μC/OS-Ⅱ是一个完整的，可移植、固化和裁剪的实时多任务内核，是用ANSI的C语言编写的，包含一小部分汇编语言代码，使之可供不同架构的微处理器使用。-embedded operating system compiler environment hardware structure transplantation Case

MCUProductionProgrammer  Silicon Lab In-system programming  involves programming devices after installation inthe end system. In this scenario, access to the debug pins (JTAG or C2 interface) is provided in the end system to enable connection to a programming “Master”. This pro-gramming “Master” can bea Silicon Labs Serial Adapter (EC2), custom hardware, or for JTAG devices, a JTAG Boundary Scan test system that supports the programming ofSilicon Labs devices.

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented