FPGA 的UDP实现

自己编写的DDS发生器，方波、三角波、正弦波、还可以输入任意的波形文件

关于LDPC解码的verilog程序，包含设计代码和验证环境(LDPC decoding on verilog procedures, including the design code and verification environment)

主要介绍，I2C总线主设备发送数据给从设备，代码实现是用Verilog语言实现的，对硬件设计者有很大好处(Introduces, I2C bus master to send data to the slave device, code is implemented in Verilog language, the hardware designer of great benefit)

说明：  运用Verilog 语言进行数字积分法，将X轴和Y轴进行插补运算。(Verilog language using digital integration method, the X axis and Y axis interpolation operations.)

代码用两种方法设计了一个基于多相滤波的内插器，低通滤波器采用128阶凯撒窗，内插倍数32，并且给定信号范围，验证了内插器的正确性，画出了内插前后信号的频谱。(The code design the interpolator based on polyphase filter using two methods.The low pass filter is 128 order Caesar window and interpolation multiple is 32.I give the range of the signal to verify the interpolator and plot the spectrum of the signal before and after the interpolator. )

定时器加数码管显示源码，以及test bench测试模块源码，经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)

通过PCI数据传输总线，实现PC到PCI板卡的高速数据传输，PCI总线使用9054芯片进行总线协议的转换(Realizing data transmission of PCI)

RobustVerilog生成verilog工具(RobustVerilog version)

使用FPGA完成AGC 自动增益的代码，适合初学者(FPGA to complete the use of AGC automatic gain code, suitable for beginners)

fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)