成都理工大学基于MAXPLUS II 的设计过程报告内涵有源程序及设计过程中的调试：在文本编辑窗口中输入二进制8位优先编码器的程序； 3设计驱动显示程序如下...

lwIPtcp/ip栈。做嵌入式的同志们肯定有很多都在找这个吧，我提供的这个包里不仅包含源代码，还有详细的参考手册（PDF）。希望大家喜欢-lwIPtcp/ip stack. So embedded comrades am sure many are looking for the bar, I offer this bundle includes not only the source code, there is a detailed reference manual (PDF). Hope you like

周立功easyarm2200平台第三章试验源码-Ligong easyarm2200 week test-source platform for Chapter III

数字式电压,电流,功率测量电网数据集合在一起便于数据的分析，而且内有MODBUS-RTU与上位机直接数据通讯-Digital voltage, current, power measurement network data together to facilitate data analysis, but there MODBUS-RTU and the host computer data communications directly

r&s是一个可裁剪的抢先式实时内核，运行在8，16，32到64位处理器上。-rs is a cutting preemptive real-time kernel running on 8,16,32 to 64 processors.

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented

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Building Emdedded Linux Systems,学习嵌入式linxu开发的经典之作-Building Emdedded Linux Systems, the development of learning embedded linxu classic works

一个嵌入式电子钟的程序-an embedded electronic clock procedures

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sdio规范文档，详细描述了sdio所有命令-SDIO Simplified Specification