安腾通过串口源系列燃烧

基于ATMEGA16的NRF905无线通信的C程序源代码，调试过的，好用！-ATmega16-based wireless communications NRF905 of the C source code, debug off, and easy to use!

开发环境：Eclipse+yagarto+openocd+st-link STM32Fxxx+MPU-6000+MS5611(BMP085)+HMC5883 AHRS算法：方向余弦矩阵

嵌入式系统的C语言设计.pdf 介绍C语言在嵌入式系统开发中的一些基本技术和技巧-c_programming_for_embedded_system.pdf

Linux2.6内核驱动实例包: globalmem驱动、含并发控制的globalmem驱动、globalfifo驱动、poll应用程序范例、异步通知应用程序范例、支持异步通知的globalfifo、 S3C2410实时钟驱动、秒设备驱动与应用程序、DMA范例、静态映射范例、作为input设备触摸屏驱动、 作为普通字符设备触摸屏驱动、看门狗驱动、平台设备、S3C2410串口驱动、S3C2410 I2C主机驱动、 SAA711x I2C设备驱动、CS8900以太网设备驱动、S3C2410 LCD驱动、FRAMEBUFFER应用程序范例-Linux2.6 kernel driver package examples: globalmem drive, including concurrency control globalmem drive, globalfifo-driven, poll sample applications, asynchronous notification application examples to support asynchronous notification globalfifo, S3C2410-driven real-time clock and second device drivers and applications, DMA example, static mapping example, as a touch screen input device driver, as a general character-driven touch-screen equipment, the watchdog driver, platform equipment, S3C2410 serial driver, S3C2410 I2C host drive, SAA711x I2C device driver, CS8900 Ethernet device drivers, S3C2410 LCD driver, FRAMEBUFFER application example

资源描述使用FPGA控制TFT液晶屏，采用Verilog编写FSM控制TFT，控制流程包括TFT的初始化、清屏、显示图片。最主要的是要根据TFT的specification，写好初始化过程。另外还要注意图片显示位置的计算。

这是一个AVR单片机的练习程序1，多谢指导-This is a practice procedures AVR MCU 1, I would like to thank the guidance of

讲解嵌入式设备上的Linux系统开发,具有一定的参考价值.-on embedded devices on the Linux system development, with some reference value.

利用stm32 来控制ov7725实现具体的应用，代码都下载stm32中验证过可以放心使用

嵌入式GSM短信息接口的软硬件设计-embedded GSM short messaging software interface design

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented