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介绍了vhdl设计fpga时仿真和综合的过程，包括软件的应用和一些注意事项，相信会对大家有所帮助-introduced a VHDL design and simulation when they simply integrated process, including software applications and some attention to matters, we believe it will help

基于XscalePXA270的PCMCIA-CF接口设计方案,非原创,转载-XscalePXA270 based on the PCMCIA-CF interface design, non-original, reprinted

16qam的systerview仿真及fpga实现-16QAM the systerview simulation and FPGA realization of

数字频率计的设计可以分为测量计数和显示。其测量的基本原理是计算一定时间内待测信号的脉冲个数，这就要求由分频器产生标准闸门时间信号，计数器记录脉冲个数，由控制器对闸门信号进行选择，并对计数器使能断进行同步控制。控制器根据闸门信号确定最佳量程。-The design of digital frequency meter can be divided into measurement and display count. The basic principle of its measurement is calculated under test signal within a certain period of time the number of pulses, which have a standard requirement by the divider gate time signal pulse counter records the number of signals from the controller to choose the gates and counters to make off synchronous control can be carried out.Controller based on the gate signal to determine the optimum range.

borland的uml设计包-the uml design package

关于监护病房的医疗器械监控需求分析-With regard to the medical intensive care unit monitoring device needs analysis! ! !

Touch Panel Controller for CAR DVD with Sunplus

不错的键盘程序，非常具有通用性，具有很强的可移植性-Good keyboard procedures, very versatile, and highly portable

用java语言编写一个程序实现学员成绩管理，每个学员包括3门课的成绩，从键盘输入学员信息， 包括学号、姓名、三门课成绩，计算出学员的平均成绩，按照学员平均成绩由大到小排序 插入功能：在排序后的学员成绩表中插入一个学员的信息，要求插入后仍然保持成绩表有序 删除功能：要求输入指定的学号，从学员信息表中删除该学员，删除后的成绩表保持有序 -用java语言编写一个程序实现学员成绩管理，每个学员包括3门课的成绩，从键盘输入学员信息， 包括学号、姓名、三门课成绩，计算出学员的平均成绩，按照学员平均成绩由大到小排序 插入功能：在排序后的学员成绩表中插入一个学员的信息，要求插入后仍然保持成绩表有序 删除功能：要求输入指定的学号，从学员信息表中删除该学员，删除后的成绩表保持有序