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用模板实现环形队列,能支持所有的数据类型,不管是自定义类型还是系统类型...
用模板实现环形队列,能支持所有的数据类型,不管是自定义类型还是系统类型-use template ring queue, to support all types of data, whether it is defined types or type of system
- 2022-02-06 14:31:56下载
- 积分:1
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Vc++的MFC的PDF教 程
Vc++的MFC的PDF教 程-Vc MFC PDF Guide
- 2022-03-29 14:11:06下载
- 积分:1
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"C Programming Language Training" Chapter VIII
《C语言程序设计实训》第八章-"C Programming Language Training" Chapter VIII
- 2022-01-25 15:17:12下载
- 积分:1
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"AutoCAD VBA technology development," a book source. AutoCAD engaged i...
《AutoCAD VBA开发技术》一书的源代码。对从事AutoCAD二次开发的朋友参考价值极高。-"AutoCAD VBA technology development," a book source. AutoCAD engaged in the development of high reference value friends.
- 2022-02-14 23:44:46下载
- 积分:1
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软件工程思想(好)
软件工程思想(好)-software engineering ideas (good)
- 2022-06-26 13:02:16下载
- 积分:1
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arm s3c44boX的测试程序(test_44b),用于s3c44boX的各个模块的测试,可用于学习44b0的编程...
arm s3c44boX的测试程序(test_44b),用于s3c44boX的各个模块的测试,可用于学习44b0的编程-arm s3c44boX testing procedures (test_44b) for the various modules s3c44boX tests can be used to study the programming 44b0
- 2022-08-05 10:35:20下载
- 积分:1
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Java Network Programming classic textbook, introduced the Java Network Programmi...
Java网络编程的经典教材,介绍了Java在网络编程各方面的实际应用,值得一看.-Java Network Programming classic textbook, introduced the Java Network Programming in the context of practical applications, an eye-catcher.
- 2022-03-31 11:08:41下载
- 积分:1
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this is the book for CSharp. It will show you about the basic programming CSharp...
this the book for CSharp. It will show you about the basic programming CSharp. I wish you good learning-this is the book for CSharp. It will show you about the basic programming CSharp. I wish you good learning
- 2022-12-21 22:40:03下载
- 积分:1
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C程序学习电子书籍 C程序学习电子书籍
C程序学习电子书籍 C程序学习电子书籍-C program C program studying studying e-books e-books e-books to learn C procedures
- 2022-03-02 07:37:33下载
- 积分:1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分:1