Commonly used phase

关于FFT实现的Verilog代码，(FFT realize on the Verilog code,)

圖形介面乘法器,也可自行使用verilog去改(Graphical interface multiplier, also free to use verilog go and change)

艾米电子的verilog HDL描述的DS18B20的程序(Amy verilog HDL description of the procedures DS18B20)

使用verilog hdl语言编程正弦波信号，能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results )

register file in vhdl and alu

8位并行输入的数转换成串行输出，是基于高级硬件编程语言VHDL编写的。(8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.)

用MSP430进行压力测试，完成数据的分析(with msp430 to continue on press test.to complete about the anlysys about data)

传感器是一种检测装置，能感受到被测量的信息，并能将感受到的信息，按一定规律变换成为电信号或其他所需形式的信息输出，以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)

说明：  MATLAB的SIMULINK和FPGA联合设计滤波器等，摆脱了传统的代码设计。(MATLAB's SIMULINK and FPGA jointly design filters and so on, and get rid of the traditional code design.)

UG586 - Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB )(UG586- Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB ))