nds on the famous DSOrganize 2.8 latest source code. Is worth studying.

VC+6.0 编写的关于计算穆斯林祷告的程序. 比较使用的应用小程序-VC+ 6.0 prepared by the Muslim prayer calculation procedures. Comparison of procedures used by the application of small

有线传输系统的原理图，是实验过的，绝对能用。希望对大家有用。-Cable transmission system schematic is too experimental, and definitely can be. Useful for all of us hope.

DOS核心中断的详细讲解，对采用DOS中断编程的同志具有很好的指导作用-DOS core interrupted elaborate on the use of the DOS interrupt programming with Comrade very good role in guiding

顺舟SZ05的ZIGBEE模块，用LPC23XX对其进行配置-Shun Zhou ZIGBEE the SZ05 module, configured with its LPC23XX

通过对计算机的组织与结构的分析，综合运用所学计算机原理知识，设计并实现较为完整的计算机，即模型机。它可以完成一般计算机的最基础功能，具备16条基本指令，以及4种寻址方式等。并且，计算机数据通路的控制将由微程序控制器来完成，CPU从内存中取出一条机器指令到指令执行结束的一个指令周期全部由微指令组成的序列来完成，即一条机器指令对应一个微程序。设计过程包括四个部分：㈠模型机硬件组成分析；㈡指令系统设计；㈢微程序设计；㈣上机实现，示范程序。- Through to the computer organization and the structure analysis, the synthesis utilization studies the computer principle knowledge, designs and realizes a more complete computer, namely molding machine. It may complete the common computer the most foundation function, has 16 elementary instructions, as well as 4 addressing ways and so on. And, the computer data path control will complete by the microprogram controller, CPU will take out a machine instruction from the memory a instruction cycle which finished to the instruction execution completely the sequence which will be composed by the microcode to complete, namely a machine instruction will correspond a microprogram. Design process including four parts: (1) Molding machine hardware composition analysis;

atmel flash 烧写源代码--ATMEL flash burning source code.

Μ/TCP-IP 设计引入了一个新的概念： 大和小的缓冲区。大的缓冲区是运输完整的以太网帧所需的大小。这是其他 TCP/IP 堆栈做些什么。但是，在嵌入式系统中，很有可能的信息传输和接收量不需要完整的以太网帧的使用。在这种情况下使用的完整的以太网帧大小的缓冲区是 RAM 的浪费。Μ/TCP-IP 允许设计器，以使系统性能最大化通过定义不同数量的小型和大型的 buffers.μC/TCP-IP 是紧凑、 可靠、 高性能 TCP/IP 协议栈，针对嵌入式系统进行了优化。

ADC0831驱动程序加上用1602显示。测试成功-ADC0831 driver coupled with the 1602 show. Successfully tested

本设计的基本要求是以复杂可编程逻辑器件CPLD为基础，通过在EDA系统软件ispDesignExpert System 环境下进行数字系统设计，熟练掌握该环境下的功能仿真，时间仿真，管脚锁定和芯片下载。 本系统基本上比较全面的模拟了计数式数字频率计，广泛应用于工业、民用等各个领域，具有一定的开发价值。- This design basic request is take complex programmable logical component CPLD as a foundation, through environment carries on the number system design in EDA system software ispDesignExpert under the System, skilled grasps under this environment the function simulation, the time simulation, base pin locking and chip downloading. This system basically quite comprehensive simulation has counted the numerical expression numeral frequency meter, widely applies to the industry, civilly and so on each domain, has the certain development value.

LED大屏幕显示系统的主要程序段 内包含几个主要的函数-LED large screen display system