(英文)无线电子事务与信息科技,对当前环境和趋势介绍非常详尽,尤其是无线技术方面...

C++ Templates for use template -C++ Templates for use template

关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work invest

windows程序设计即编程思想，北京大学第二办-programming windows program design that is thinking of the second Beijing run

教学课件微型计算机汇编语言程序设计-Courseware micro-computer assembly language programming

哈尔滨工业大学的一个经典的DSP课件，做的非常好 与大家分享-Harbin Institute of Technology, a classic DSP courseware, to do the very good to share with you

国际大学生程序设计竞赛例题解(郭嵩山 李志业 金涛 梁锋)(一)，程序设计书籍，acm参考信息-International Collegiate Programming Contest Example solution (Songshan Guo Zhi-Ye Li Jin Tao Liang Feng) (a), programming books, acm reference information

啥也不说了，ExtJS2.0实用简明教程,chm格式-ExtJS2 cookbook chm format

一款java数据库的全实例教程，所有程序都已经过编译检查。-one example of the entire handbook, all the procedures have been compiled after checks.

大名鼎鼎的thinking in c++的第二版本 中文版翻译的很差,这里是英文版-Famous thinking in c++ The second version of the Chinese version of the translation of the very poor, here is the English version

可自学全部教程phosopshop- May study independently complete course phosopshop