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DA_Test
说明: 基于CycloneV FPGA与电阻网络的数模转换器代码,能够实现键控更改频率,通过ROM IP核存储波形数据。(Digital to analog converter code based on cyclonev FPGA and resistance network can realize keying change frequency and store waveform data through ROM IP core.)
- 2020-03-29 22:36:29下载
- 积分:1
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AD-conversion-using-LTC1298
AD conversion using LTC1298
- 2012-06-06 15:26:41下载
- 积分:1
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FPGA
学习FPGA的资料,基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)
- 2010-03-15 21:19:56下载
- 积分:1
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DDS_signal_genarator
这是一个利用verilog语言编写的信号发生器的例子,值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)
- 2013-12-23 10:12:52下载
- 积分:1
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主要介绍了FPGA设计的基本原则、基本设计思想、基本操作技巧、常用模块。...
主要介绍了FPGA设计的基本原则、基本设计思想、基本操作技巧、常用模块。-Mainly introduces the basic principles of FPGA design, basic design concepts, basic operating skills, commonly used modules.
- 2022-08-25 13:03:15下载
- 积分:1
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a good use of the Verilog Programming cpu procedures, we must make good use of.
一个很好的利用verilog编程实现的cpu程序,一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.
- 2023-03-28 18:35:03下载
- 积分:1
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利用分频可以产生一系列脉冲,根据输入脉冲的不同决定你得到的一系列脉冲频率...
利用分频可以产生一系列脉冲,根据输入脉冲的不同决定你得到的一系列脉冲频率-The use of sub-band can produce a series of pulses, according to input pulse of different decisions you have a series of pulse frequency
- 2023-08-19 18:35:03下载
- 积分:1
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costas
costas的verilog程序,包含乘法器,DDS,鉴相器,环路滤波器等模块(costas the verilog program, including multipliers, DDS, phase detector, loop filter modules)
- 2011-08-19 10:20:53下载
- 积分:1
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imports
displayport 参考设计,可以对比自己工程做验证,另有参考设计XAPP1178未找到,采用方案为DP159 + Artix7 FPGA(xilinx displayport sink design)
- 2021-01-11 16:58:50下载
- 积分:1
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vgav2
This verilog vga test circuit
- 2012-08-09 08:10:09下载
- 积分:1