介绍列昂2微处理器

VHDL operators basics

Verilog实现高速AD7606数据采样，8通道，采样频率可调，支持串口数据发送，亲测可用。(Verilog AD7606 high-speed data sampling, 8-channel, the sampling frequency is adjustable, support for serial data transmission, pro-test is available.)

说明：  vivado lwip 应用文档 基于zynq 7020(vivado lwip example text of zynq)

基于CPLD器件的线型CCD东芝TCD1501的驱动程序，用verilog语言开发。(CPLD devices based on linear CCD driver Toshiba TCD1501 using Verilog language development.)

用Verilog实现的脉冲宽度调制程序，在quartus平台上测试成功。(Using Verilog implementation of pulse width modulation, in quartus platform test successfully.)

OFDM系统新型RS编解码的verilogHDL设计，经测试误码率性能提高(OFDM system verilogHDL new RS codec design, improved bit error rate performance tested)

说明：  ad9649的fpga驱动程序,FMC接口，基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)

Verilog HDL教程 什么是Verilog HDL？ Verilog HDL 硬件描述语言(What is a Verilog HDL tutorials Verilog HDL? Verilog HDL hardware description language)

串口控制器，基于vivado软件下开发，包含代码及管脚分配文件(Serial port controller)

Verilog学习例程EP2C5，内有跑马灯等18个程序(Verilog learning routines EP2C5, marquees and other 18 programs)