D 触发器

用FPGA verilog hdl模拟类I2C通信

上下LED计数器

fpga串口的接收程序基于verilog语言拿走不用谢。(The receiving program of FPGA serial port is based on Verilog language.)

以ISE为开发环境，Verilog语言编写程序。功能：FPGA控制 LCD_1602动态显示秒表(In the development environment of ISE, Verilog language is used to write programs. Function: LCD_1602 dynamic display stopwatch controlled by FPGA)

turbo码在LTE中的实现，并在fpga中得到了实现(turbo code in LTE implementations, and have been achieved in fpga)

应用布莱克曼窗实现FIR滤波器，并绘制相应波形图案(Application Blackman window FIR filter, and draw the corresponding waveform pattern)

说明：  由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)

//***********************************************************//data        : 2007-07-11 11:30:00 //version     : 1.0////module name : Mp3Decode////modification history//---------------------------------//firt finish  2006//             2007-07-11  11:30:00   //***********************************************************

很好的fft学习程序感兴趣的同学可以看哈，下载一下。(it is very good )

基于Verilog的FPGA时钟分频程序(FPGA clock frequency division program based on Verilog)