-
222
说明: VHDL BISS,SSI,ENDAT2.2, ENCODER
- 2020-11-24 17:46:39下载
- 积分:1
-
FPGA实现SHA256
利用硬件(可编程逻辑器件FPGA)实现密码算法SHA256,在FPGA中嵌入软核NIOSii,在NIOSii上进行软件编程。硬件EDA工具为ALTERA的Quartus ii,软件IDE为eclipse(嵌在Quartua中)。
- 2022-06-21 07:17:01下载
- 积分:1
-
MIPS_LANG
说明: verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分:1
-
OFDM_802_11
ofdm的发射链路和接收链路的Verilog源代码,包括长短训练序列的生成,导频插入,加cp,ifft。(Source code of transmission link and reception link of OFDM)
- 2020-12-22 21:19:06下载
- 积分:1
-
control
该程序描述了运用FPGA进行控制的S形曲线和其他传统加减速控制曲线方法的控制曲线比较研究。(This program is compiled in matlab circumstance。Describing the approach of S-curve control method in FPGA in machine controlling.)
- 2011-12-08 10:22:11下载
- 积分:1
-
Chapter10
第十章的代码。
本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench,所举实例具有很强的实用性和代表性,每个实例均给出了介绍、功能分析、程序代码和结果演示(Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate)
- 2009-11-17 13:52:32下载
- 积分:1
-
ddr2_controller
A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.
- 2015-11-16 00:31:22下载
- 积分:1
-
simpleCpu
relative cpu design implementation
- 2013-08-14 21:22:39下载
- 积分:1
-
LMS_filter
这是自适应滤波器,使用verilog代码来编写的,已通过了仿真,效果很好。希望能给大家好好分享!(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)
- 2020-12-08 21:19:19下载
- 积分:1
-
fpga
ldpc码的FPGA编译与仿真实现,欢迎分享,分享快乐。(LDPC code compilation and simulation。)
- 2014-05-24 17:32:11下载
- 积分:1