vc++ source books used for image processing research,

布 线 的 基 本 流 程.pdf-the basic wiring process. Pdf

关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work invest

软件工程思想（好）-software engineering ideas (good)

A Survey of Maneuvering Target Tracking Part III Measurement Models

压力与速度耦合的算法，改进版本。计算结果比较可靠-Pressure and velocity coupling algorithm, an improved version. More reliable results

AT中文资料，适合初学者，主要对一些常用指令的介绍-AT the Chinese data, suitable for beginners, mainly on the introduction of some commonly used commands

清华大学电子商务课课件-Tsinghua University, class of e-commerce software

用C++设计游戏引擎-With C++ The design of game engine

C#编程100例源码,有好多例子呀,希望对学习C#的朋友有用,这是第四个包!20个-C# programming source of 100 cases, many examples of it, want to learn C# useful friends, This is the fourth package! 20

VHDL程序设计与应用，PDG图书用工具dgreader free.exe打开-VHDL design and application procedures, PDG books tools dgreader free.exe Open