在quartus中使用IP核的实际例子与流程

密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)

说明：  基于数码管独立显示和三色灯的交通指示系统设计(Design of Traffic Indicator System Based on Digital Tube Independent Display and Tri-color Lamp)

VHDL TESTBENCH书写规范，对学习FPGA的同学很有帮助，掌握仿真语言书写规范。(VHDL TESTBENCH description of the norms, the students learn FPGA helpful, master the language of simulation techniques)

曼彻斯特编解码 Xilinx提供的VHDL的源代码-Manchester codec Xilinx provide VHDL source code

这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱：wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com

说明：  使用FPGA实现RGB图像转灰度图像的算法，下载入自己的电路板可直接将摄像头拍摄到的图像实时转换成灰度图像(FPGA is used to realize the algorithm of transforming RGB image into gray image. The image captured by the camera can be converted into gray image in real time by downloading it into its own circuit board)

用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)

SDIO 接口，实现SD卡的控制器功能，带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)

加减可控制的十到十六进制计数器。完全准确，可以放心使用的(Add and subtract controllable ten to hexadecimal counter. Entirely accurate, can be at ease of use)

led 发送卡代码(led send card verilog)