vga 显示测试

FPGA 帧同步源代码 调试无错误 ALTERA 平台(Frame synchronization FPGA)

说明：  基于FIR设计的100阶数字滤波器，选择的矩形窗(100 - order digital filter based on FIR)

说明：  处理器系统，处理器加上存储器，从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)

数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)

描述了IC-hus公司推出的BISS-C协议内容，包括单向biss-c协议以及标准biss-c协议(Describes the BISS-C protocol introduced by IC-hus, including the one-way biss-c protocol and the standard biss-c protocol)

verilog 简易频率计的设置，包括整个工程(verilog simple frequency meter settings, including the entire project)

ADD MOV MOVi SUB四指令cpu设计，qutartus，(Design of four-instruction CPU)

应用布莱克曼窗实现FIR滤波器，并绘制相应波形图案(Application Blackman window FIR filter, and draw the corresponding waveform pattern)

Verilog编程语言经典手册Classic Manual Verilog programming language(Verilog programming language classic manual Classic Manual Verilog programming language)

UG二次开发，课程作业，研究生，学习，初学者，打孔，复杂体，阵列 UG C program，homework，student，study，first，hole，complex，many( UG C program，homework，student，study，first，hole，complex，many)