oversampling_echo_gen

Verilog写的 CRC 编码-CRC code written in Verilog

IDEA加密算法的实现-IDEA Encryption Algorithm Implementation

检测CRC编码 看CRC编码在传输后是否有错误 有变动 (Detection CRC codes to see whether the CRC coding errors in the transmission there is a change)

vc编写的rsa加密软件，包括源码．有兴趣的同志可以另做界面-vc prepared rsa encryption software, including source code. Comrades who are interested can do the other interface

MD5计算,可以将文件提取出摘要，进行比对，校验，实现指纹算法-MD5, can be extracted document summaries, compare and testing to achieve fingerprint algorithm

While there are many AES cores around, this one is designed with LUT6 based FPGA architecture in mind from day one.  The AES Decryption Core for FPGA implements the decryption portion of the AES (a.k.a. Rijndael) algorithm described in the FIPS-197 specification. Key lengths of 128 / 192 / 256 bits are supported, each with a separate instantiation wrapper. Since the core is designed to take advantage of LUT6 based FPGA archit

安全支持提供器接口（SSPI）源码- Safe support provision connection (SSPI) source code

在PB中通过读取硬盘序列号实现软件加密-in PB by reading drive serial number encryption software

VC实现RSA算法的程序，好东西啊，vc6.0编译通过-VC to achieve RSA algorithm procedure, a good thing ah

ElGamal密码算法的程序实现，在Dev-Cpp下编译通过，程序中还有较详细的注解.(ElGamal cipher program in Dev-Cpp compiler under the adopted procedures are more detailed comments.)