can转以太网网关，采用NUTOS NUTNET

atmega16开发板、Proteus、原理图-ATmega16 development board, Proteus, schematic diagram

交通灯控制系统，可灵活设置多路时间-Traffic light control system, can be flexibly set up multi-channel time

jlink的FLASH参数配置工具，自动生成CSV格式的文件，用于自己添加新的FLASH型号。-jlink the FLASH parameter configuration tool that automatically generates CSV format file, add a new FLASH for its own models.

8051上的CRC8校验 A CCITT-8 CRC calculator. The source contains both the calculated (smaller but slower) version, and the table driven (faster but larger) version.-8051 CRC8 check on the CCITT A-8 CRC calculator. Th e source contains both the calculated (smaller but slower) version, and the table driven (faster but larger) versio n.

8位AD转换器的使用加液晶显示,转换器是八通道并行转换器-8-bit AD converter plus the use of liquid crystal display, switches, eight-channel parallel converter

之前看过论坛上有一个C8051和S3530A的通信程序，但我认为很复杂而不具有通用性，我自己写的一个3530通过I2C总线与单片机的通信程序,虽然很短,但是很实用.-Read before the forum have a C8051 and S3530A communications procedures, but I think very complex and not universal, and I wrote it myself a 3530 through the I2C bus communication with the SCM process, although very short, but very practical .

c51学习使用的资料 有100多个原程序-decoder learning to use the data more than 100 original program

msp430f449的文件， 很有用的-MSP430F449 document very useful

msp430f169 flash操作 430单片机有丰富的外围模块其中flash模块可以使程序员在下载完程序后仍能对flash进行读写-430 Singlechip msp430f169 flash operation has a wealth of external flash module module which allows programmers to download End procedures can still read and write to flash

SPI是一个环形总线结构，由ss（cs）、sck、sdi、sdo构成，其时序其实很简单，主要是在sck的控制下，两个双向移位寄存器进行数据交换。 假设下面的8位寄存器装的是待发送的数据10101010，上升沿发送、下降沿接收、高位先发送。 那么第一个上升沿来的时候 数据将会是sdo=1；寄存器=0101010x。下降沿到来的时候，sdi上的电平将所存到寄存器中去，那么这时寄存器=0101010sdi，这样在8个时钟脉冲以后，两个寄存器的内容互相交换一次。这样就完成里一个spi时序。 -SPI bus is a ring structure, by ss (cs), sck, sdi, sdo composition, its timing is actually very simple, mainly under the control of the sck and two bi-directional shift register for data exchange. Assuming the following 8-bit register is loaded to send the data to be 10,101,010, rising to send, receive falling edge, high first sent. Well, the first rising edge to the time data will be sdo = 1 register = 0101010x. Falling edge comes, sdi on the level will be stored to the register, then register at this time = 0101010sdi, so 8 clock pulse later, the contents of two registers to exchange time. This will be completed in a spi timing.