one, producer

提出了基于嵌入式技术CCD 采集系统的新方法,并以ARM微处理器和FPGA 芯片为核心设计了嵌入式CCD 采集系统,解决了传统采集方法中系统过于庞大和复杂的问题,具有结构简单、小型化和智能化的特点。试验结果表明,该系统实现了CCD 输出图像的高速采集和实时显示,数据采集速率达到5 MHz。-Embedded technology based on CCD acquisition system A new method, and ARM microprocessors and FPGA chip is designed as the core embedded CCD acquisition system to address the traditional acquisition methods in the system too large and complex problems, is simple in structure, small and intelligent features. Experimental results show that the system realizes high-speed CCD output image acquisition and real-time display, data acquisition rate up to 5 MHz.

设有n项独立的作业{1,2,…, n},由m台相同的机器加工处理。作业i所需要的处理时间为ti。约定：任何一项作业可在任何一台机器上处理，但未完工前不准中断处理；任何作业不能拆分更小的子作业。多机调度问题要求给出一种调度方案，使所给的n个作业在尽可能短的时间内由m台机器处理完。设计算法。 -Stand-alone operation with n items (1,2, ..., n), by m units the same machine processing. Job i the processing time required to ti. Convention: any one job can be processed on any machine, but does not pre-completion are not allowed to interrupt processing any operation can not be split smaller sub-operations. Multi-machine scheduling problem requires paper, a scheduling program, so that given the n-operation in the shortest possible time processed by m machines. Design algorithms.

文中详细介绍了SIP各个层次模块的功能和设计，描述了重要的协议流程 和设计方法，重点阐述了关键技术的使用和实现中需要解决的问题，最后设计了网 络拓扑对协议栈进行了功能测试，测试结果表明该 SIP 协议栈的实现完全满足 VoIP 网关对信令建链功能的需求。 -paper describes in detail the various levels of SIP module and functional design, Description of the important agreements and design process, focuses on the key technology use and realization of the need to address the problem, final design of the network topology of the protocol stack for functional testing, Test results show that the SIP protocol stack to achieve fully meet the VoIP Signaling Gateway to build the demand chain functions.

WINDOWS核心编程笔记-core Windows Programming Notes

各类最新的电路图，硬件设计方面，enjoy it-all the latest circuit, hardware design, enjoy it

AVRcam Release v1.4 for robotics

this the minarm system that ihad been designed

基于FPGA的增量式光电编码器计数电路设计,文章含有Verileg HDL代码.-FPGA-based incremental photoelectric encoder count circuit design, the article contains Verileg HDL code.

商务WESTRADE.COM 网站项目策划书 ,很好的成功经验-business www planning,very good design and release

this the program for seven segment diasplay in P89c51 microcontroller-this is the program for seven segment diasplay in P89c51 microcontroller