Verilog HDL系列和转换的准备。我用电流输出类型。股份有限公司...

fpga Verilog 控制读写flash (fpga Verilog flash )

简单流水线CPU，使用 verilog实现，实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)

说明：  4位二进制加法计数器的两种不同VHDL的描述,与比较。(4-bit binary addition of two different counter VHDL description, and more.)

8051MCU在FPGA上实现的源代码，用VHDL语言编写-8051MCU in the FPGA to achieve the source code, using VHDL language

本例程位于 VMD642_CPLD目录中。 使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使 用 Verilog HDL书写，编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)

八阶巴特沃兹iir数字滤波器，四个二阶节，verilog代码实现，多路分时复用(batterworth，iir，8order，four second order section)

说明：  能实现输入0.5 1 5块钱的累加，然后对应购买的商品价格进行比较，显示找的钱数或错误灯(MY English is very good)

rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)

一个采用IIC协议，从ROM里面读数据的接口程序，采用verilog语言，状态机实现。(One with IIC protocol, which read data from ROM interface program, using verilog language, the state machine implementation.)

对NC Verilog的基本介绍，详细的图解，非常适合初学者使用，一个word文档和一个pdf文档-NC Verilog on the basic introduction, detailed diagrams, very suitable for beginners to use, a word document and a pdf document