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如何提取嘴唇检测
你好
附上有不同的图像搜索可用的链接的所有图像。
- 2022-09-28 16:50:04下载
- 积分:1
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PCM
本例设计一个码率为500kb/s,字长为8 位、帧长为128 个字、帧同步码为EB90H 的PCM 采编器。用VHDL语言实现的。(This designs a code to lead for the 500 kbs|s, the word is long for 8, the growing is synchronous code of for 128 words and for the EB90 H of PCM adopt to weave a machine.Use what VHDL language carry out.
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- 2021-04-23 17:08:47下载
- 积分:1
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gtx_aurora_zc706_example
Aurora 8B/10B协议是Xilinx公司针对高速传输开发的一种可裁剪的轻量级链路层协议,通过一条或多条串行链路实现两设备间的数据传输。协议Aurora协议可以支持流和帧两种数据传输模式,以及全双工、单工等数据通信方式。(The Aurora 8B / 10B protocol is a tailor-made lightweight link layer protocol developed by Xilinx for high-speed transmission that enables data transfer between two devices over one or more serial links. Protocol Aurora protocol can support two data transfer modes, stream and frame, as well as full-duplex, simplex and other data communications.)
- 2018-01-23 08:53:37下载
- 积分:1
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lab6-3-8DECODER
数字设计和计算机体系结构:用verilog语言描述3-8译码器的设计与实现(Digital design and computer architecture: use verilog language describe 3-8 decoder design and implementation)
- 2016-10-24 17:20:07下载
- 积分:1
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code
Due to its high modularity and carry-free addition, a redundant
binary (RB) representation can be used when designing high performance
multipliers. The conventional RB multiplier requires an additional RB partial
product (RBPP) row, because an error-correcting word (ECW) is generated
by both the radix-4 Modified Booth encoding (MBE) and the RB encoding.
This incurs in an additional RBPP accumulation stage for the MBE multiplier.
In this paper, a new RB modified partial product generator (RBMPPG) is
proposed; it removes the extra ECW and hence, it saves one RBPP
accumulation stage.
- 2017-10-01 23:34:56下载
- 积分:1
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apb2ahb
verilog code for apb to ahb convert
- 2021-01-05 03:38:55下载
- 积分:1
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fir_lms
基于FIR滤波器的LMS自适应算法的FPGA实现,verilog语言(FIR filter based on LMS adaptive algorithm on FPGA, VHDL language)
- 2015-10-11 19:23:03下载
- 积分:1
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DDR2_16bit
说明: ddr2原理图设计,原厂电路图设计,很好很强大 16bit(ddr2 schematic design, the original schematic design, a very powerful 16bit)
- 2011-02-24 11:07:35下载
- 积分:1
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turbo_dinter
说明: 电网协议信道解交织器设计FPGA实现,适用于PB16的宽带电力线载波通信(Grid protocol channel deinterleaver design FPGA implementation, suitable for PB16 broadband power line carrier communication)
- 2020-05-08 15:53:18下载
- 积分:1
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无线通信FPGA设计的例程源码
本书以Xilinx公司的FPGA开发平台为基础,综合FPGA和无线通信技术两个方向,通过大量的FPGA开发实例,较为详尽地描述了无线通信中常用模块的原理和实现流程。全书共有13章。第1章介绍无线通信的背景知识;第2~4章简要讲述FPGA开发技术的原理、Verilog HDL语言及相应软件开发平台的使用方法;第5~12章较为详细地介绍数字处理的硬件开发基础,以及无线通信系统各个模块的原理与FPGA实现;第13章引导读者完成WCDMA系统部分关键技术的FPGA实现,以提高读者的工程开发能力。
- 2022-03-18 09:09:09下载
- 积分:1