协调器源代码

STM32F4和PC之间的VCP可帮助您创建ST微控制器和你的电脑。你可以通过MATLAB，Visual Basic或任何终端。有好玩的沟通之间的多桥。红色指示灯闪烁，表示建立连接。绿色LED灯闪烁，每10毫秒，表明数据发送或接收到的STM32F4板。

Altera recommends the following system configuration: * Pentium II 400 with 512-MB system memory (faster systems give better software performance) * SVGA monitor * CD-ROM drive * One or more of the following I/O ports: - USB port (if using Windows XP or Windows 2000) for USB-Blaster(TM) or MasterBlaster(TM) communications cables, or APU programming unit - Parallel port for ByteBlasterMV(TM) or ByteBlaster(TM) II download cables - Serial port for MasterBlaster communications cable * TCP/IP networking protocol installed * Windows 2000, Windows NT 4.0 with Service Pack 3 or later, or Windows XP * Internet Explorer 5.0 or later Memory & Disk Space Requirements USB开发--Altera recommends the following system configuration:* Pentium II 400 with 512-MB system memory (faster systems give better software performance)* SVGA monitor* CD-ROM drive* One or more of the following I/O ports:- USB port (if using Windows XP or Windows 2000) for USB-Blaster(TM) or MasterBlaster(TM) communications cables, o

interrrupt parell port avr c micom program

tasking编译器实例开发的自己编写的程序.-tasking compiler development of the examples of their preparation procedures.

中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。

uc/GUI的源码应用例子1--Example 1 for UC/GUI.

Pspice 教程基础篇 在这个教程中，我们没有提到关于网络表中的Pspice 的网络表文件输出，有关内容将会在后面提到!-Pspice Tutorial Basics In this tutorial, we have not talked about the network table in the Pspice network table file output, the content will be Behind that!

嵌入式开发帮助文档-help documentation Embedded Development

嵌入式原理作业嵌入式原理及应用试题- embedded principle and application questions

Part I We wish to display on the 7-segment displays HEX3 to HEX0 the values set by the switches SW15−0. Let the values denoted by SW15−12, SW11−8, SW7−4 and SW3−0 be displayed on HEX3, HEX2, HEX1 and HEX0, respectively. Your circuit should be able to display the digits from 0 to 9, and should treat the valuations 1010 to 1111 as don’t-cares. 1. Create a new project which will be used to implement the desired circuit on the Altera DE2 board. The intent of this exercise is to manually derive the logic functions needed for the 7-segment displays. You should use only simple VHDL assignment statements in your code and specify e