一类复杂循环排队系统的计算机模拟及其在进程调度中的应用...

模拟电子技术的课件 希望对需要的人会有些帮助 -Analog electronic technology courseware hope to those who need some help

Rational rose 编程设计流程指导-Programming Rational rose design process to guide

本压缩文件是关于windows xp优化大师的七十项REG文件-the compressed files on the windows xp optimize the master document 70 REG

韦根协议是国际上统一的标准，有很多格式，标准的韦根26-bit 应该是最常用的格式。此外，还有34-bit 、37-bit 等格式。此源代码主要用于将韦根26数据转换为卡号数据。

As the source code name, this code is writing in Verilog and also inside the folder there is a c code to see the simulation results from verilog.

用VHDL进行的dds系统设计，包括键盘输入和ＬＣＤ显示，编译通过了-Dds carried out using VHDL system design, including the keyboard and LCD display, the compiler through the

OFDM信道估计算法仿真,统计无线OFDM系统信道估计算法的误码率。-The channel estimation of OFDM system and error rate caculation.

Automatic Image Segmentation using 2D Multistage Entropy

his little function rounds a number (or the elements of a vector ot matrix) towards the nearest number with N significant digits. Examples: roundsd(0.012345,3) returns 0.0123 roundsd(12345,2) returns 12000 This is a useful complement to Matlab s ROUND, ROUND10 and ROUNDN (Mapping toolbox), especially when dealing with data with a large variety of order of magnitudes. I was about to upload this file when I found "sd_round.m" by Edward Zechmann (see aknowledgment), which has similar feature (and more). But, because my script is very different in coding (much much shorter), I decided to share it anyway.

SOFTWARE SCHEMATIC INTERFACE FOR PROGRAMMING TMS370 MCUs