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建设领域应用软件测评通用规范,规定应用软件的质量要求和功能要求、建立应用软件的质量模型、编写测评大纲和测评计划、实施测评等工作...
建设领域应用软件测评通用规范,规定应用软件的质量要求和功能要求、建立应用软件的质量模型、编写测评大纲和测评计划、实施测评等工作-construction field application software evaluation general specification, provides application software quality requirements and functional requirements. establish software quality model evaluation program and the preparation of test plans, the implementation of evaluation work
- 2022-10-11 15:00:03下载
- 积分:1
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Linux boot process descriptions from IBM
Linux boot process descriptions from IBM
- 2022-03-12 05:16:47下载
- 积分:1
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ip电话的关键技术,包括语音编码,压缩,打包,分组交换,以及保证语音质量而采取的回声抵消技术....
ip电话的关键技术,包括语音编码,压缩,打包,分组交换,以及保证语音质量而采取的回声抵消技术.-ip telephone key technologies, including voice coding, compression, packing and packet switching, and voice quality assurance and the echo cancellation technology.
- 2022-08-09 01:25:24下载
- 积分:1
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stream mutimedia China P2P Streaming Media Report
stream mutimedia 中国P2P流媒体研究报告-stream mutimedia China P2P Streaming Media Report
- 2023-03-24 13:45:04下载
- 积分:1
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非接触式IC 卡工业水表及其售水系统的设计与实现
非接触式IC 卡工业水表及其售水系统的设计与实现-non-contact IC card sales and industrial water meter System Design and Implementation
- 2022-05-12 14:53:20下载
- 积分:1
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audio applicaton circuit explain
audio applicaton circuit explain
- 2022-07-07 08:49:14下载
- 积分:1
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该包是根据DE405提供的国际天球矩形参考框架的基本位置和速度方面的资料...
该包是根据DE405提供的国际天球矩形参考框架的基本位置和速度方面的资料-The package is based on international Tianqiu DE405 rectangular frame of reference for the basic position and velocity information
- 2022-10-19 13:05:04下载
- 积分:1
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SCART接口的定义和功能介绍。Special pins on EURO_SCART
SCART接口的定义和功能介绍。Special pins on EURO_SCART-SCART interface definition and functionality of introduction. Special pins on EURO_SCART
- 2022-05-31 01:11:15下载
- 积分:1
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现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代...
现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代码,提高故障覆盖率。本文简要讨论NRS4000微处理器芯片的以边界扫描测试为主体,以自测试为补充的可测试性设计框架。着重介绍芯片的边界扫描设计和芯片中译码控制器PLA和微程序ROM以及采用内嵌RAM结构的指令Cache和寄存器堆的内建自测试设计。仿真结果表明,这些可测试性设计大大缩短了测试代码的长度。-modern microprocessors have a very high degree of integration and complexity, there Register pile, Cache such as embedded components, but Chip few relatively small, There must be the self-test design and testing of other design code to simplify testing, fault coverage. This paper briefly discussed Key words microprocessor chip to the boundary-scan test as the mainstay, Since the test to add to the test design framework. Highlighting the boundary-scan chip design and chip decoder PLA and micro-controller procedures and the use of embedded ROM RA M structure of the instruction cache and register stack of built-in self-test design. The simulation results show that these tests can greatly shorten the design of the test code length.
- 2022-04-01 18:08:40下载
- 积分:1
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In simple terms what is described and the development trend of PXI Bus
深入浅出的介绍了什么叫PXI总线及发展趋势-In simple terms what is described and the development trend of PXI Bus
- 2022-01-26 03:38:34下载
- 积分:1