FFT的C实现方法 (函数名: 快速傅立叶变换 本函数测试OK,可以在TC2.0,VC++6.0,Keil C51测试通过。)...

最简单的时钟程序，用的是2051的芯片，有图，有说明，很详细。不会的一看就会，会的不要见笑-most simple clock procedures, using the 2051 chip, a map, descriptions, very detailed. No one will look at, not laughed at the

单片机控制钟表显示的c语言代码.-SCM clocks displayed c language code.

单片机的步进电机控制和一些具体的原理还有脉冲运动控制-stepmotor

C8051F310单片机应用程序，模拟量(电压）的采样,比较器,LCD显示,SPI通信,FRAM读写,温度测量程序，PCA捕捉，键盘扫描，USB与RS232转换实验等。-C8051F310 single-chip applications, analog (voltage) of the sampling, Comparators, LCD display, SPI communication, FRAM read and write, the temperature measurement procedure, PCA capture, keyboard scanning, USB and RS232 conversion experiments.

Can convert midi to rtttl

非常好的介绍MCS-51单片机以及汇编指令编程的文挡！可以打好扎实的基础。-Very good description as well as the MCS-51 microcontroller programming text block assembly instructions! You can lay a solid foundation.

CAN总线物理层协议的描述，对通信最底层的细节了解很有帮助。-CAN protocol physical layer

本科毕业设计做的一个东西,用的是AT908515,驱动128*64的LCD,开发环境是ICCAVR6.22.这些代码现在已经在成熟的产品中应用了-Undergraduate Graduation do something, using the AT908515. Drivers 128* 64 LCD, ICCAVR6.22 development environment. these codes are now in a mature application of the product

本源程序使用C51控制的PLL(SANYO LC72131)收音,可以通过HT1621驱动LCD显示,有完整的按键控制程序模块,能通过KEY进行各种功能操作,整个程序采用模块化设计,移植方便,可以初学者参考使用.(之前的那个也是我上载的,怎么就没开通?)-C51 use the source control PLL (SANYO LC72131) radio, Driving through HT1621 LCD Display, a complete module button control procedures, KEY through various functional operation, the whole process has a modular design and facilitate transplantation, beginners can use and reference. (which is also before I posted, how never opened)

本系统参照片上系统的设计架构、采用FPGA与SPCE061A相结合的方法，以SPCE061A单片机为进程控制和任务调度核心；FPGA做为外围扩展，内部自建系统总线，地址译码采用全译码方式。FPGA内部建有DDS控制器，单片机通过系统总线向规定的存储单元中送入正弦表；然后DDS控制器以设定的频率，自动循环扫描，生成高精度，高稳定的5Hz基准测量信号。-The system with reference to the design of system-on-chip architecture, used a combination of FPGA and SPCE061A approach to SPCE061A Singlechip for process control and scheduling core mission FPGA for external expansion, internal self-system bus, address decoding using the entire translated code approach. DDS has built internal FPGA controller, microcontroller through the system bus to the provisions of the storage unit into the sine table DDS controller and then to set the frequency, automatic cycle of scanning, to generate high precision and high stability of the baseline measurement 5Hz signal.