一本详介绍小波变换原理，并给出多个小波在多个工程中的应用．...

cdn初级用户使用手册，帮助您快速了解CDN-cdn primary user manual to help you quickly understand the CDN

单片机设计小结，心得很多，值得借鉴和学习-china

超声波和射线照片数据超声波和射线照片数据

Designing Embedded Hardware

关于TCPIP的三本好书-on the three books

I/O Kit Fundamentals Chapter 1 What Is the I/O Kit? Chapter 2 Architectural Overview Chapter 3 The I/O Registry Chapter 4 Driver and Device Matching Chapter 5 The Base Classes Chapter 6 I/O Kit Families Chapter 7 Handling Events Chapter 8 Managing Data Chapter 9 Managing Power and Device Removal Appendix A I/O Kit Family Reference Chapter 10 Base and Helper Class Hierarchy

关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work invest

windbg最佳入门指南，完全中文版，详细介绍了windbg对r3和r0程序的调试方法与技巧.-windbg Best Getting Started Guide, complete the Chinese version of windbg details for r3 and r0 Debugging methods and techniques.

通过大量事实记载以及任务对话，再现了林彪作为一名将军的生平，也揭露了他如何一步步走向灭亡的过程。-fact documented by a large number of tasks and dialogue that recreates the Lin Biao as a general"s life, but also to expose how he had destroyed a step by step process.

UART自适应波特率发生器，其中是以文档的形式来介绍怎样实现UART波特率发生器的实现-Adaptive UART baud rate generator, which is in the form of a document to describe how to achieve the realization of UART baud rate generator