it is about target tracking using the simulator"Castalia" in c ++ based on omn...

phase frequency detector verilog

产品管理系统。本设计的要求是实现入库、库存和出库统一管理，帮助企业实现新产品信息化管理。-product management system. This requirement is designed to achieve storage, inventory, and from the unified management, and help enterprises achieve new product information management.

To（*）表示漏斗的数字

小妹,实力也只能这样了,好想成为会员呀,因为我想好好学习-Girl power can only be the case, you want to be a member because I wanted to study hard

带音乐功能的跑表VerilogHDL描述-music with the stopwatch Verilog HDL description

八皇后问题八皇后问题-8 8 Queens

大学计算机数字逻辑实验作业 用Multisim仿真软件编写 计数器 用双D触发器74Ls74构成四位二进制串行计数器 二分频计数原理-University computer digital logic operations using Multisim experimental simulation software used to prepare counter-D Trigger 74Ls74 constitute four serial binary frequency counter two hours counting Principle

1.本软件为绿色软件，解压后在“串口调试助手V2.2.EXE”上右击，再选“发送桌面快捷方式”即可将程序快捷方式放在桌面上。 2.程序名“串口调试助手V2.2”不要更改，否则无法使用帮助文件-1. The software for the green software, unpacked the "serial debugging assistant V2.2.EXE" right-click, select "Send desktop shortcuts" may be procedural shortcuts on the table. 2. Procedures were "serial debugging assistant V2.2" not to change, not to use the help file

CCS视频演示-设置CCS于硬件仿真模式-CCS-CCS installed in the hardware emulation mode

This program uses read() and write()-This program uses read () and write ()