-
局域网用户屏幕的控制和查看程序
局域网用户屏幕的控制和查看程序-LAN user screen control and view the procedure
- 2022-02-03 15:38:38下载
- 积分:1
-
C plus plus programming software specifications, novice C plus plus useful
C plus plus的软件编程规范,初学C plus plus 很有用的-C plus plus programming software specifications, novice C plus plus useful
- 2023-04-14 06:45:03下载
- 积分:1
-
xr17d158v C代码驱动CE5
XR17D158V c code driver for CE5
- 2023-06-15 09:55:03下载
- 积分:1
-
Send message code, has to verify the steps to send one: Download javacomm20
短信发送代码,已经验证可以发送
步骤一:下载javacomm20-win32.zip
步骤二:com4端口上接上GSM猫,或者改变源代码
OK-Send message code, has to verify the steps to send one: Download javacomm20-win32.zip Step 2: com4 port connected to GSM cats, or changing the source code OK
- 2022-12-06 22:40:03下载
- 积分:1
-
一个简单的用JAVA实现的屏幕抓图(源代码)
一个简单的用JAVA实现的屏幕抓图(源代码)-with a simple screen JAVA Previously (source code)
- 2022-02-07 11:29:20下载
- 积分:1
-
开发包在C++语言开发编辑软件
开发程序包的C语言开发的编缉程序软件-development package in C language development editing software
- 2022-08-05 23:27:38下载
- 积分:1
-
另外一个XML格式文件xsl,对soap的理解更深,有表头明细
另外一个XML格式文件xsl,对soap的理解更深,有表头明细-another xsl XML format, the right soap deeper understanding, the first detailed Table
- 2022-07-01 09:33:54下载
- 积分:1
-
Wishbone to LPC (Low
Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided.
None of this has been tested (yet) with a third-party LPC Peripheral or Host.
- 2022-03-21 15:28:38下载
- 积分:1
-
FPGA数字信号处理的FPGA实现[1].FPGA数字信号处理的FPGA实现[1].
FPGA数字信号处理的FPGA实现[1].FPGA数字信号处理的FPGA实现[1].-FPGA digital signal processing FPGA realize [1]. FPGA digital signal processing of the FPGA to achieve [1].
- 2022-03-15 04:59:21下载
- 积分:1
-
In this simulink model , BPSK modulation and demodulation is simulated .A square...
In this simulink model , BPSK modulation and demodulation is simulated .A square root raised cosine pulse shaped signal is modulated and given as input to the demodulator.The received signal
is demodulated and given to the detector where it is matched filtered and down-sampled .The effects of symbol timing offset
can be seen by varying the phase of down-sampling
operation.The signal transmitted is recovered
at the detector output.-In this simulink model , BPSK modulation and demodulation is simulated .A square root raised cosine pulse shaped signal is modulated and given as input to the demodulator.The received signal
is demodulated and given to the detector where it is matched filtered and down-sampled .The effects of symbol timing offset
can be seen by varying the phase of down-sampling
operation.The signal transmitted is recovered
at the detector output.
- 2023-08-21 07:40:03下载
- 积分:1