i2c bus project implementation can be used in altera verification environment

总结设计中的重点及注意的地方，常出现错误的地方等。-Summarize the design of the focus and attention of local, often the wrong place and so on.

数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成 果的可修改性和可移植性都较差。基于VHDL 的数控分频器设计,整个过程简单、快捷,极易修改,可移植性强。他可利用 并行预置数的加法计数器和减法计数器实现。广泛应用于电子仪器、乐器等数字电子系统中。-NC divider output signal frequency is a function of input data. Using traditional methods of design, process and circuit design are complex and can modify the design of the results are poor and portability. NC VHDL divider based on the design, the whole process simple, fast, easy to modify, strong portability. He can use preset number of parallel addition and subtraction counter counter to achieve. Widely used in electronic equipment, musical instruments and other digital electronic systems.

如何用VHDL语言对时钟进行分频以达到计数目的(how to achive counting by VHDL Language)

ISE环境下Verilog编程实现机械按键去抖(ISE Verilog programming environment under mechanical debounces)

说明：  VHDL语言的有限状态机法控制8位/12位自动转换通道模数转换器AD7938(VHDL, FSM method to control 8-bit/12-bit ADC AD7938 auto-conversion channel)

VHDL实例这是我下载到的最好的VHDL实例，看完这些实例，可以使你有一个长足的进展-VHDL example

verilog设计点滴经验，对fpga设计人员很有好处-Experience in verilog design

对原信号进行拉格朗日插值运算，实现信号重采样(The original signal Lagrange interpolation operation, to achieve signal resampling)

本代码是实现了lwip协议栈,可以移植到其他类型的嵌如式操作系统上-This code is to achieve a lwIP protocol stack can be ported to other types of embedded operating systems such as the type

This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.