i2c bus project implementation can be used in altera verification environment

说明：  FPGA锁相环实验： 顶层文件加底层IP文件构成 top中例化ip核pll(Experiment of Phase-Locked Loop Based on FPGA)

辛辛苦苦的作品应用于DE2 的 开发。。希望对大家有用。-hard work for Dictyophora development. . We hope that the right useful.

说明：  实现UDP的网络传输，在PC建立UDP的服务器，向fpga的ip：192.168.0.25发送数据，实现回环通讯。(The network transmission of UDP is realized. UDP server is set up in PC, and the data is sent to IP: 192.168.0.25 of FPGA to realize loop communication.)

带自适应波特率发生器UART实现，经过FPGA验证的！-UART baud rate generator with adaptive realization, after FPGA validation!

基于FPGA实现FFT算法，内容包含论文、程序、仿真等等(Implementation of FFT algorithm based on FPGA)

VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料-VHDL hardware description language and digital logic circuit design, VHDL learning good information

说明：  实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)

all funtions for a scale meter for maps in a 8051 microcontroler with an alphanumeric lcd display

说明：  希望对VHDL的学习大家有帮助，望大家指出错误，浮想交流！(We want to learn VHDL help, hope you point out an error, daydreams exchange!)

用Verilog实现的呼吸灯，用Verilog实现的呼吸灯(Verilog huxideng)