RTC阅读使用R8C / 13新的编译器

232同485转换的原理图，采用串口偷电技术，我已经调试通过了

用C语言编的带数码管显示的电子琴，含有实验报告-Made by C language with a digital display of the organ, the report contains the experimental

在nrf9e5芯片基础上编写的C51源代码，可实现点到点无线通信的发送部分。-In nRF9E5 chips prepared on the basis of the C51 source code, can be sent point-to-point wireless communications, in part.

嵌入式开发中用于自制JTAG的dll文件-Embedded Development for the dll file homemade JTAG

完整的方案，256mnand,用sunplus spce系列芯片，先得VIP再说-integrity of the program, 256mnand with sunplus spce series chips, come VIP repeat

LPC1768芯片开发demo，内部包含UART，ADC，GPIO，ETH等工程例程，有助于新手及实际项目参考使用

中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。中国电波钟BPC解码程序,适用精确及时的单片机和设备适用。

MSP430的12位AD驱动程序 [05-10-29] 74HC165驱动程序 [05-10-29] 74HC595驱动程序-MSP430 12 AD driver [05-10-29] 74HC165 driver [05-10-29] Bit Drivers

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented

tms320c55x上的图像处理程序-tms320c55x the image-processing program