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Interpolator-of-polyphase-filter
代码用两种方法设计了一个基于多相滤波的内插器,低通滤波器采用128阶凯撒窗,内插倍数32,并且给定信号范围,验证了内插器的正确性,画出了内插前后信号的频谱。(The code design the interpolator based on polyphase filter using two methods.The low pass filter is 128 order Caesar window and interpolation multiple is 32.I give the range of the signal to verify the interpolator and plot the spectrum of the signal before and after the interpolator. )
- 2021-01-09 13:18:51下载
- 积分:1
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SoC验证的方法和技巧
SOC Verfication Methodology and Techniques
- 2022-06-14 22:50:41下载
- 积分:1
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Verilog-classic-tutorial
Verilog经典教程,非常好的资料!值得一看!(Classic Verilog tutorials, very good information! Worth a visit!)
- 2012-11-12 09:32:53下载
- 积分:1
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SPI_test
说明: 用FPGA于32进行SPI单向通信,FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)
- 2020-06-18 10:40:02下载
- 积分:1
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VHDL设计的功能齐全的交通灯程序,经过仿真一切功能符合要求。...
VHDL设计的功能齐全的交通灯程序,经过仿真一切功能符合要求。-VHDL
- 2022-01-25 23:26:36下载
- 积分:1
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VHDL 编写的RAM例子
VHDL 编写的RAM例子-RAM prepared VHDL example
- 2023-03-23 05:20:03下载
- 积分:1
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SkanMean
Firmware for autotuning Sensor
- 2015-06-25 20:01:36下载
- 积分:1
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ADC实验
基于stm32开发平台的,模拟ad采样程序设计,可直接下载使用(stm32 zhijiexiazaishiyong)
- 2018-02-02 00:32:43下载
- 积分:1
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huawei
华为内部资料,包括verilog电路设计,硬件工程师手册,verilog约束,synplify使用指南等。内容较全面。(Huawei internal information, including verilog circuit design, hardware engineers manual, verilog constraints, synplify use guides. Content more comprehensive.)
- 2015-07-11 20:08:52下载
- 积分:1
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CH4CH2CH1VHDL 数字电路参考书所有程序9
CH4CH2CH1VHDL 数字电路参考书所有程序9-CH4CH2CH1VHDL digital circuit reference all proceedings 9
- 2022-11-24 11:15:04下载
- 积分:1