用verilog实现UART协议

codes for zynq devices

光标移动程序适合新人学习，对于新人提升自身能力比较好，让新人快点掌握写程序的基本思想.

说明：  38译码器，D触发器，全加器，计数器，抢答器，优先编码器，111序列检测器，并行输入转串行输出(poor English. 38 decoder, D trigger, full adder, counter, scrambler, priority encoder, 111 sequence detector, parallel input to serial output)

新版 小米抢购器 -源码 已经测试，代码很有用，已经抢了好几个小米3了，希望对大家有用(The new millet to snap up- source Have test, the code is useful, has robbed several millet 3, hope useful for everyone)

带时钟分频器的计数器的代码是用verilog编写的。代码是用verilog HDL编写的，完全可以合成，可以在FPGA上实现；

8通道同步AD芯片7608的FPGA控制程序(FPGA control program of ad7608(8 channel synchronous AD chip))

FFT源代码64。

采用xilinx的ROMIP核产生类似正弦信号，经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)

可以实现DDC各个模块的功能，如内插、抽取、FIR滤波等功能(DDC can realize the function of each module, such as interpolation, extraction, FIR filtering)

说明：  用Verilog实现的基于FPGA的简单避障游戏(A game based on FPGA,using Verilog)