ADC_Ctrl

一个简单的429协议实现的VHDL语言代码，具备基本的429数据字的收发功能，并且仿真通过，效果一般。(A simple 429 protocol to realize the VHDL language code, with basic data words of 429 transceiver functions, and through simulation, the effect of general.)

VHDL实现简单打地鼠游戏机，北邮数电实验(VHDL simple playing hamster games, BUPT number of electric experiment)

AD73311芯片的控制和数据程序，用于控制音频AD芯片。(AD73311 chip control and data program)

该例子是基于sopc的IIC总线设计完整设计，分为硬件和软件部分，软件部分是用c语言编写的。该项目是个以完成的项目，据有较高的参考和经济价值。该例子是原来做过的项目。 整个项目是在Quartus II 7.0和nios IDE环境下开发。 (This example is based on the IIC bus design sopc complete design, divided into hardware and software, the software part is written in c language. The project is to complete the project, according to the reference and a higher economic value. The example is a project originally done. The whole project is in the Quartus II 7.0 and the nios IDE development environment.)

FPGA与DAC芯片的SPI接口驱动，实现串行数据的传输。(Realizing the communication between FPGA and DA chip)

说明：  基于FPGA设计的一段测试VGA接口的VHDL小程序\功能为在显示器上间隔显示横条、竖条以及棋盘格等彩条信号，希望对初学FPGA驱动VGA接口的电子爱好者有用(FPGA-based design of a VGA interface VHDL test applet \ functions for the intervals shown in the display bar, vertical bars and checkerboard patterns and other signals of color, hope for beginners FPGA VGA interface driver useful for electronic enthusiasts)

基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file)

掌握二-十进制(BCD码)异步计数器的工作原理和设计方法； 掌握中规模集成二-五-十进制异步计数器74LS90的功能及其应用；(Master II- Decimal (BCD code) the principle and an asynchronous counter design grasp the scale of integration in two- five- Decimal asynchronous counter 74LS90 features and applications )

(Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig

UART 变送器正以一个 8 位数据总线和 8 位地址总线。变送器 FIFO 是包含和发射机状态机包括国家： 闲着，开始的传输，传输停止的实际数据传输。UART 变送器可以连接到任何具有可配置的数据和地址总线的 UART 接收机。