Database System Design Course

并口的接口规范，对开发并口驱动的同行很有用。-Parallel Port Interface Specification, on the development of parallel drive counterparts useful.

基于VRML的虚拟奥运环境系统的构建及“人文奥运"可视化表达研究.-VRML-based virtual environment system for the Olympic Games and the

存储管理分区分配算法的源码-storage management district allocation algorithm source code

此包搜集了２００５年四川省电子设计大赛的题，包含了各个学校的模拟题目，供大家参考练习-This package collected in Sichuan Province in 2005 the title Electronic Design Contest, including the simulation of each school subject for your practice

1. 系统功能：能读取词法分析结果进行语法分析，在语法分析的同时进行语义分析，生成中间代码； 2. 数据结构：设计存储中间结果及中间代码(逆波兰式)的数据结构； 3. 算法：递归下降分析法的实现； -1. Conduct anti department features 取 trees millet To: Yang Kui Xu Fu Subaru vehicles other shallow ， Pleiades Pang Yang Xu Yang Xu Pang Now Subaru vehicles时filthy shallow cavity义Pang Xu rough Pleiades ， proliferation中Jie Tungsten measurements ； 2. Tub stool To: chirpy beat Fu Jian Chuai few中Jie Do not Fu Zhi-Jie中Tungsten measurements (column sparse format split) cavity bowl beat Fu stool ； 3.算Yang Liao your To: mushroom onion Pleiades Yang Xu cavity wife of mother

对LTE中的差错控制方法HARQ的类型和算法仿真进行了介绍，并对物理层的HARQ与上层的交互过程进行了介绍-Of LTE in the HARQ error control methods and algorithms of the type of simulation to carry out the introduction of the physical layer and the top of the HARQ process of interactive introduction

Link Establishment in Ad Hoc Networks Using Smart Antennas-Opnet_thesis

1， 实验题目，和实验基本要求 • • • • • • • • • • • • • • • • • • • • 2， Quartus Ⅱ的运行环境及DE2实验板简介• • • • • • 3， 电路图和线路图，电路工作原理，系统框图• • • • • • • 4， 操作过程 ：建工程、编译、仿真 、下载运行• • • • • 5， 收获及心得体会，主要遇到的问题及解决过程• • • • • -1, the experimental subject, and the basic requirements of the experiment • • • • • • • • • • • • • • • • • • • • 2, Quartus Ⅱ operating environment and DE2 board Introduction • • • • • • 3, circuit diagram and the circuit diagram, working principle of the circuit, the system block diagram • • • • • • • 4, the operation process: building works, the compiler, s

MAX II CPLD具有灵活的可编程接口，合并了分立的FLASH存储器件，能快速和容易地配置FPGA，DSP，ASIC等。本中文手册将让用户对CPLD有一个宏观的认识。-MAX II CPLD with a flexible programmable interface, the merger of the separation of FLASH memory, can quickly and easily configure the FPGA, DSP, ASIC, etc.. Chinese manual will allow users to have a macro on the CPLD awareness.