IIC总线Verilog实现（读写16为数据）

基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)

自编的64B/66B解码程序，做毕业设计的时候写的。(The decoding process 64B/66B , written when i am in the school。)

在vivado开发环境下，调用ram IP，实现可调频的正弦波信号发生器。(vivado IP signal generator)

AD9267 10bit 640MSPS高速ADC的FPGA参考设计 Verilog语言实现 包含Xilinx ISE12.2工程

此vhdl程序实现了在FPGA上构建UART通信串口。分为两部分，UART的发送端transfer和接收端receiver。需要外部根据需求提供波特率时钟。(This program implements the building vhdl UART serial interface on the FPGA. Divided into two parts, UART transfer sender and receiver receiver. Required to provide the baud clock external demand.)

WCDMA数字频域干扰抵消器，绝对的高手写的文档和代码，里面资料齐全方便自学，是很好的学习FPGA实现无线通信模块的资料。(WCDMA Frequency Domain Interference Cancellation figures, the absolute master of written documentation and code, which complete information to facilitate self-learning, is a very good learning FPGA implementation of wireless communications and information.)

应用背景应用于多路图像并行采集和显示的场合。关键技术基于华升FPGA图像处理开发板完成了四路图像采集，并送VGA分屏显示，程序全部为Verilog硬件语言编写，摄像头采用OV7670型，程序注释清晰，扩展性强，理论上可以继续扩展多路。

用vhdl写实用96例子, 有RAM，PID 等(Using VHDL to write practical examples of 96, there are RAM, PID and so on)

16QAM,64QAM,256QAM调制下的球形译码(16QAM, 64QAM, 256QAM modulation sphere decoding)

具有16个校验位的RS编码器，在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)