以C2051单片机为核心，采用TLC2543 12位串行A/D转换器，设计了一个串行数据采集/传输模块，给出了硬件原理图和主要源程序...

HLA (high level architecture) with UML design

本文在回顾RS-485标准的基础上从几个方面简要讨论了提高RS-485网络可靠性的一些措施.-In this paper, recall the standard RS-485 based on a number of ways to raise briefly discussed the RS-485 network reliability measures.

ALU8加法器ALU8 ALU8 ALU8 -ALU8ALU8ALU8ALU8ALU8ALU8ALU8ALU8

基于FPGA的GFP（通用成帧协议）封装数据成帧的实现。-FPGA-based GFP (Generic Framing Protocol) encapsulated data Framing realized.

提出了基于嵌入式技术CCD 采集系统的新方法,并以ARM微处理器和FPGA 芯片为核心设计了嵌入式CCD 采集系统,解决了传统采集方法中系统过于庞大和复杂的问题,具有结构简单、小型化和智能化的特点。试验结果表明,该系统实现了CCD 输出图像的高速采集和实时显示,数据采集速率达到5 MHz。-Embedded technology based on CCD acquisition system A new method, and ARM microprocessors and FPGA chip is designed as the core embedded CCD acquisition system to address the traditional acquisition methods in the system too large and complex problems, is simple in structure, small and intelligent features. Experimental results show that the system realizes high-speed CCD output image acquisition and real-time display, data acquisition rate up to 5 MHz.

小型连锁超市进销存系统的分析、设计与实现-small supermarket chains Invoicing System Analysis, Design and Implementation

为了便于我们分析和识别电路，更好的理解555电路，这里我们这里按555电路的结构特点进行分类和归纳，把555电路分为3大类、8种、共18个单元电路。-In order to facilitate our analysis and the identification circuit, a better understanding of circuit 555, here we are here by the structural characteristics of the circuit 555 classified and summarized in the circuit 555 is divided into 3 broad categories, eight kinds, a total of 18 unit circuit.

基于视觉的疲劳驾驶监测关键技术研究 非常好的设计资料 -Vision-based driver fatigue monitoring of critical technology research design very good information

QPSK调制器的FPGA实现，提出了一种基于FPGA实现QPSK的方法-QPSK Modulator FPGA, presents a FPGA-based QPSK method of achieving

数字频率计的设计可以分为测量计数和显示。其测量的基本原理是计算一定时间内待测信号的脉冲个数，这就要求由分频器产生标准闸门时间信号，计数器记录脉冲个数，由控制器对闸门信号进行选择，并对计数器使能断进行同步控制。控制器根据闸门信号确定最佳量程。-The design of digital frequency meter can be divided into measurement and display count. The basic principle of its measurement is calculated under test signal within a certain period of time the number of pulses, which have a standard requirement by the divider gate time signal pulse counter records the number of signals from the controller to choose the gates and counters to make off synchronous control can be carried out.Controller based on the gate signal to determine the optimum range.