关于介绍第四代IP技术和第六代IP技术的一本好书

如果其他会员下载一次您上载的源码，您的可用下载数就会增加1次。更多说明请参看[帮助-If other members to download once you upload the source code, you will increase the number of available downloads 1. More description see [Help

用简明易懂的C语言源代码描述的算法，相信会对各位学习这门基础语言有很大帮助。-Used and easily understandable description of C language source code of the algorithm, I believe you will learn the basis of this language has been inspired by them.

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一篇关于linux下的XWindows框架GPE的技术文档，对于想了解嵌入式linux下的图形系统有帮助-a linux on the XWindows GPE framework of the technical documentation, For Embedded Linux would like to know the graphics system help

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关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work invest

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SSD3: Object-Oriented Programming and Design Introduction This course introduces students to problem solving by means of object-oriented design and implementation. Emphasis is on problem analysis and solution design, documentation and implementation. Students use commercial software libraries, and create software projects. Programming assignments are carried out in Java.

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