ADC驱动verilog代码

给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)

VERILOG实现无分频时钟，包括测试文件，经过验证可用(VERILOG is no difference between the frequency of the clock implementation, including test papers, can be used after authentication)

32位单周期校验码

用Verilog语言实现QPSK调制，QPSK是一种数字调制方式。它分为绝对相移和相对相移两种。 (Verilog language using QPSK modulation, QPSK is a digital modulation. It is divided into absolute and relative phase shift of the phase shift of two.)

EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计(EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design)

VHDL汇编语言原理及源代码。spartan 3e开发板试用。(VHDL language.)

UML2 apprendre a modeliser a l aide de UML

Verilog语言描述，统计图片的像素值直方图(Verilog，Pictures of the pixel value histogram statistics)

它是基于Verilog硬件描述语言浮动乘法器的数字化设计。该设计可以实现全功能，是更好的灵活性，其理论基础上浮动计算并补偿位移倍增。

FIFO的verilog描述(Verilog description of the FIFO)