AT91RM9200 net mouth test code, only to learn (ADS1.2).

本设计的基本要求是以复杂可编程逻辑器件CPLD为基础，通过在EDA系统软件ispDesignExpert System 环境下进行数字系统设计，熟练掌握该环境下的功能仿真，时间仿真，管脚锁定和芯片下载。 本系统基本上比较全面的模拟了计数式数字频率计，广泛应用于工业、民用等各个领域，具有一定的开发价值。- This design basic request is take complex programmable logical component CPLD as a foundation, through environment carries on the number system design in EDA system software ispDesignExpert under the System, skilled grasps under this environment the function simulation, the time simulation, base pin locking and chip downloading. This system basically quite comprehensive simulation has counted the numerical expression numeral frequency meter, widely applies to the industry, civilly and so on each domain, has the certain development value.

大型设计中FPGA的多时钟设计策略,很详细的描述了在FPGA设计中时钟设计的方法-FPGA design large multi-clock design strategy, a very detailed description of the FPGA design clock design method

我们的项目implemenUART全面聊天通过UART和代码的每一步都有注释解释清楚

CPU是S3C44B0X,是学习时可用来参考,很好的原理图-CPU is the study is available for reference and a good diagram

单片机采用C8051F310 ，采集模块GY-30光强模块，采集光照强度数据; 上位机（轮询方式）通过RS485总线发送采集命令。

snmp，python库，用于pysnmp，python语言，对pyasn1的demo

128x64 LCD通用CDMA电话机 软件 包括英文、16X16汉字显示，拨号、电话等功能

这是一个驾校的系统　，请大家好好看那．-This a Driving School system Please remember watch.

红外模块的控制程序实现，利用keil51 C 编写，已调通

用VC++6.0与单片机通过RS232通信程序，上位机程序主要是控制单片机发出一些指令，单片机上传一些数据到上位机，上位机通过这些数据作出决策，再发送指令到单片机。-With VC++ 6.0 and MCU through RS232 communication procedures, procedures for the main PC to control a number of directives issued by single-chip microcomputer, microcontroller upload some data to the host computer, host computer through the data to make decisions, and then send commands to the Singlechip.