通过VHDL语言的例子，FPGA的VHDL语言的原型（八）是

Xilinx system generator

FPGA的驱动并行接口的DAC程序，效率较高。(FPGA-driven parallel interface of the DAC process more efficient.)

说明：  KMP算法的Verilog HDL实现，模式串从模块的外部输入，计算next函数，然后进行KMP匹配。有仿真。环境为Quartus II 8.0 Web Edition。(Verilog HDL implementation KMP algorithm, pattern string from the module' s external input, calculate next function, then KMP matching. A simulation. Environment for the Quartus II 8.0 Web Edition.)

针对兆瓦级风电并网逆变器主电路研制中存在的并联扩容、开关频率较低和LCL滤波器难以优化设计等问题，提出了采用交流侧串接电感再进行并联的均流方案，采用载波移相技术提高变流器的等效开关频率，提出了LCL滤波器的设计原则，并给出了上述设计的理论依据和实现方法。通过对2兆瓦风电变流器主电路的仿真验证了上述技术方案。(MW-class wind power for grid-inverter main circuit of the parallel development of existing capacity, a lower switching frequency and LCL filter design difficult to optimize the problem, a series inductor AC side in parallel are further flow program, the use of carrier phase-shifting technology to enhance the equivalent converter switching frequency, a LCL filter design principles, and gives the above-mentioned theoretical basis for the design and implementation. 2 MW of wind power converter main circuit simulation program to verify the above-mentioned technology.)

这本书是关于Xilinx公司开发的ISE工具的中文教程，适合于初学FPGA设计的人使用，全书内容丰富，共包括9章，通过此书的学习可以了解并掌握FPGA的设计流程及设计方法。-This book is on the Xilinx

FPGA的测频程序，用了D触发器，能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)

基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)

说明：  实现串口通讯以及SLIP协议传输数据，增加了特殊字符的转义(Realization of Serial Communication and SLIP Protocol)

说明：  半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)

这是一个基于FPGA实现的GPS的程序，保证可以用-This is an FPGA-based GPS program to ensure that you can use ... ...