This is rs (255,223) verilog source coding. Inside : encode, decode, test

89s51的9AT24C02总线试验程序-89s51" s 9AT24C02 bus testing procedures

在51的P1口连接8个发光2级管，实现8个发光2级管轮流显示-In 51 of the P1 port to connect eight light-emitting tube 2, the achievement of eight light-emitting display two pipe rotation

24C02 的读写程序。解压 直接调用。 有说明注释 的 。-24C02 read and write procedures. Extracting called directly. A descriptive notes.

汇编检测 mac，用汇编写的检测系统mac代码-compilation detection mac, with the compilation of writing code detection system mac

“神经网络剪枝算法”是一种通过简化神经网络结构来避免网络过拟合的有效方法之一。将权值拟熵作为惩罚项加入目标函数中，使多层前向神经网络在学习过程中自动约束权值分布，并以权值敏感度作为简化标准，避免了单纯依赖权值大小剪枝的随机性。由于在剪枝过程中只剪去数值小并且敏感度低的连接权，所以网络简化后不需要重新训练。算法效率明显提高。

实现了算术运算功能，是分别通过水平移位和循环移位来实现的，正在学习诶汇编语言的朋友可以参考一下，是我的作业-Realize the arithmetic functions, respectively, through the level of displacement and the cyclic shift to realize, and are learning assembly language ah friends can refer to, is my operating

这是一个学生成绩管理系统，有部分功能还不完善，以后会慢慢更新的：）-This is a performance management system for students, some function is not perfect, the future will gradually updated :)

8位微程序控制计算机设计实验 汇编控制CPU简单乘法-eight microprocessor-controlled experimental design compilation of computer control CPU simple multiplication

有整数乘法、除法、加法及减法的使用汇编语言子程序-There is an integer multiplication, division, addition and subtraction of the use of assembly language subroutines

一个基于51单片机的时钟电路设计源代码,还包括了电路图.PCB.源程序-51 single-chip-based clock circuit design source code, also includes the circuit diagram. PCB. Source