广义表的实现用vc

verilog 实现的CPU，用Modelsim SE 6.2b 创建的工程，包含测试文件。- CPU of verilog implementation

这是一个用vhdl写的控制VGA的源程序,可以显示6种不同的图案,你也可以显示图象-This is a control written using VHDL VGA source, you can display 6 different designs, you can also display images

1、 秉承EIP-CDIO的教学理念，以实验设计的方式，通过篮球计时器的设计,运用Protel软件进行绘制原理图和PCB图，增进对电子产品的生产制作过程的了解,提高对电子产品的制作工艺的认识.-1, our EIP-CDIO teaching philosophy, a way to experimental design, through basketball timer design, the use of mapping software Protel schematic and PCB plans to enhance the production of electronic manufacturing process understanding, improve on electronic products understanding of the production process.

用VC控制GE的打开以及一些简单功能，效果明显-VC control with GE, as well as some simple function of the open and obvious effect

Read this to understand basics about software testing.

simulation of 24 pulse isolated. it is the best compared with 12 pulse and below in power factor. it can be achieved with 12 pulse and simple pulse doubling circuit.

神龙卡播放MP4源代码，采用DSHOW开发技术-SHENLONG card MP4 player source code, using dshow Development Technology

一个mfc写的石子棋小游戏-a mfc write small stones chess game

这个个pc--mcu程序只要下下来解压就可以使用了没问题的都通过了的-Pc mcu this month under the program as long as it can use the decompression problems have not adopted the

用vc++开发的拼图游戏，初学者还是很有用的。-vc development with the picture arrangement game, beginners or very useful.