SDRAM猝发读写Verilog程序

xilinx 平台的SPI从接口实现源码，供参考学习(used xilinx,slave-spi interface.)

《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)

拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现(Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone)

In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them includes all the VHDL source codes of the component.)

数字钟电路的实现，可以24小时计时，可调整时间！(Digital clock circuit implementation, a 24-hour timer, adjustable time!)

实现相机采集数据的自动白平衡功能，采用verilog语言编写。(The automatic white balance function of camera data acquisition is realized)

数字系统设计的入门书，教你如何学会用verilog语言实现各种数字逻辑功能，例程经典易懂(xiawenyu verilog)

利用VHDL语言编写的4*4键盘扫描程序，经过测试，可以放心使用。(Using VHDL language 4* 4 keyboard scanning procedures, tested, safe to use.)

一个关于VERILOG与VHDL混合编程，混合验证的资料(A hybrid programming on VERILOG and VHDL, mixed verification data)

模块