AODV的分析资料 很不错的拉

OFDM系统，有（2，1，7）卷积码编码，分组交织，viterbi译码-OFDM system, there are (2,1,7) convolutional code encoding, packet intertwined, viterbi decoding

simulation of the communication time for a space-time adaptive processing algorithm on a parallel embedded system

记事本的小程序，很详细-Notepad small procedures, very detailed

Delphi和C Builder的控件，在WINDOWS 95/98和WINDOWS NT/2000下提供串口通讯。可以与MODEM或其它与串口相连的设备进行通讯。通过多线程和覆盖来获得最佳性能。功能部分受限制。-Delphi and C Builder s control, in the WINDOWS 95/98 and WINDOWS NT/2000 provide serial communication. With MODEM or other connected with the serial communications equipment. Through multi-threaded and coverage to get the best performance. Features some restricted.

南京德托电子科技有限公司的产品手机短信二次开发控件DetuoSmsOcx.ocx-Detuo Nanjing Electronic Technology Ltd. SMS products Second Development Control DetuoSmsOcx . ocx

can总线通信C++ BUILDER源程序。用于编写can通信协议，以及测试can总线。-can BUILDER C bus communication source. Can prepare for the communication protocol and can test bus.

Digital electronics is one of the fundamental courses found in all electrical engineering and most science programs. The great variety of LabVIEW Boolean and numeric controls/indicators, together with the wealth of programming structures and functions, make LabVIEW an excellent tool to visualize and demonstrate many of the fundamental concepts of digital electronics. The inherent modularity of LabVIEW is exploited in the same way that complex digital integrated circuits are built from circuits of less complexity, which in turn are built from fundamental gates. This manual is designed as a teaching resource to be used in the classroom as demonstrations, in tutorial sessions as collaborative studies, or in the laboratory as interactive exercises.

TI 官方提供的msp430 操作CC3000mod wifi模块的源代码，包括驱动和接口程序，开发环境为IAR。

rs232 verilog code inclouding of TRX and testbench. This zip file contains the following folders: verilog_source  -- Source Verilog files:  uart.v   -- top level file  txmit.v  -- transmit portion of uart  rcvr.v   -- receive portion of uart -- Source Verilog files:  txmit_tf.v -- testbench for transmit portion of uart  rcvr_tf.v  -- testbench for receive portion of uart  

程序简单实现了画蜂窝小区的拓扑图，输入变量为小区数目和小区半径，自动画出小区拓扑图结构，并返回小区中心的坐标位置。适合初学者使用，可用于拓展。