TCL2543电压表中的应用，能通讯的测量表，内存的分配

石器时客户端工具有需要的快去下可以增加石器时代图像修改登陆图-Stone tools at the client in need of fast increase of the Stone Age images can be modified landing plan

本演示程序中，人数n应为任意的，首先应输入一个值赋给初始报数上限m，程序应能自动保存出列人的序号和将出列的人所持的密码赋给m，再次作为报数上限，如此循环，直至所有人都出列为止。-The demonstration program, the number n should be arbitrary, we must first enter a value assigned to the initial reported that the maximum number of m, the procedure should be able to automatically save a list of the serial number of people and held out the password assigned to m, again reported as the maximum number of such cycles, until all that far out.

海尔扩张之路；描述海尔不断扩展的进程。"资本是船"-Haier expansion path; Description Haier expansion process. "Capital is shipping"

XDoclet 使自动生成部署描述符更为便利。XDoclet 是一个代码生成实用程序，它允许您使用象 JavaDoc 标记之类的东西来向诸如类、方法和字段之类的语言特征添加元数据。随后，它利用这些额外的元数据来生成诸如部署描述符和源代码之类的相关文件。-XDoclet automatically generated so that it more convenient for the deployment descriptor. XDoclet is a code generation utility, which allows you to use as JavaDoc tags or something like that to such as the type, methods, and fields such as language features to add metadata. Subsequently, it uses the additional meta-data to generate, such as deployment descriptors and source code, such as relevant documents.

设计模式中单件类的例子，用VC++开发，有源码和可执行程序，直接编译运行。是根据李建忠的设计模式讲义编写的例子，对初学设计模式的人很有帮助。-Design Patterns in a single category of examples, using VC++ development, there is source code and executable programs, run the compiler directly. LI Jian-zhong design is based on notes prepared by the example model of learning design patterns were very helpful.

一篇介绍独立分量基础知识以及其实现的ppt。-Introduced a basic knowledge of independent component as well as its realization ppt.

File splitter is a utility to split files acording to size and drives-File splitter is a utility to split files acording to size and drives

S3C44B0X 具有 8 路模拟信号输入的 10 位模/数转换器（ADC），它是一个逐次逼近型 的 ADC，内部结构中包括模拟输入多路复用器，自动调零比较器，时钟产生器，10 位逐次 逼近寄存器（SAR），输出寄存器如下图所示。这个 ADC 还提供可编程选择的睡眠模式， 以节省功耗。 -S3C44B0X with eight analog signal input to the 10 analog/digital converter (ADC), It is a successive approximation type ADC, the internal structure includes analog input multiplexers, Automatic Zero comparators, Clock Generator, 10 successive approximation register (SAR), the output register as shown in the diagram below. ADC also provided the option of programmable sleep mode to save power consumption.

VB6.0+ACCE-VB6.0+ ACCE

介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性。-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the