ti超低功耗单片机msp430定时器介绍

ISO/IEC 14496-5 OLD MPEG4标准-ISO/IEC 14496-5 standard MPEG4 OLD

dem数据，可以作为研究dem数据的例子-dem data, data can be used as examples of research dem

综合布线系统方案设计及预算案例讲解-integrated wiring system design and on budget case

simple scene -simple scene .........................

计算机专业的操作系统实验 运行环境 C语言环境下-Computer operating system runtime environment experiment C language environment

华为,大规模逻辑设计指导书,规格详细，包括：VHDL编写规范，Verilog编写规范，asic设计方法，同步电路设计规则，vhdl电路设计，代码可重用设计，-Huawei, a large-scale logic design guide books, detailed specifications, including: VHDL specification preparation, Verilog specification preparation, asic design, synchronous circuit design rules, vhdl circuit design, reusable code design,

吉林大学的 dsp ppt教程，适合初学习dsp的人。-Jilin University of dsp ppt tutorials, suitable for early learning dsp people.

ULN2003中文资料,需要的朋友可以看看.-ULN2003 Chinese data, the need for a friend can see.

应用背景The MAX 7000A device architecture is based on the linking of high-performance LABs. LABs consist of 16-macrocell arrays, as shown in Figure 1. Multiple LABs are linked together via the PIA, a global bus that is fed by all dedicated input pins, I/O pins, and macrocells.关键技术MAX 7000A macrocells can be individually configured for either sequential or combinatorial logic operation. The macrocells consist of three functional blocks: the logic array, the product-term select matrix, and the programmable register. Figure 2 shows a MAX 7000A macrocell.

本程序完成*.img文件的读取，写入ASC文件，程序基于VS2010， AE10.1 平台 。程序已经调试使用，在文件包中有详细的数据结构说明，也有实验指导文件。代码可作参考