《细说中国历史丛书》第9卷 本书《细说中国历史丛书》系已故旅美历史学家黎东方先生所著。作者以生动别致的“讲史”形式详细讲述了自秦汉到中华民国各个历史时期的重...

vb的网络应用说明-vb network application notes

熟悉这本书之后,你可能变成一个电脑问题专家-familiar with this book, you may become a computer expert! !

IEEE 802.16f-2005 IEEE Standard for Local and Metropolitan Area Networks - Part 16: Air Interface for Fixed Broadband Wireless Access Systems--Amendment 1--Management Information Base Management Information Base (MIB) text file. Management Information Base (MIB) text file. Management Information Base (MIB) text file. -IEEE 802.16f-2005 IEEE Standard for Local and Metropolitan Area Networks- Part 16: Air Interface for Fixed Broadband Wireless Access Systems--Amendment 1--Management Information Base Management Information Base (MIB) text file. Management Information Base (MIB) text file. Management Information Base (MIB) text file.

the datestrut and arithmetic with 贪心算法概论-the datestrut and arithmetic with greedy algorithm Introduction

该文档是高级电源管理的规格说明，例如关闭电源-The documents are the advanced power management specifications, such as turn off the power and so on

一个非常好的C++教程,十分不错的啦,要下的快下哦-a very good C Guide, a very good beauty to the next, oh fast

1. 程序结构 2. 词法问题 3. 类型 4. 类 5. 界面 7. 表达式 8. 语句 -1. Program structure 2. Lexical 3. Type 4. Category 5. Interface 7. Expressions 8. Statement

非常好的书，可以对c++有更深入的理解，掌握语言的本质-very good book, a pair of c-depth understanding and mastering the language of nature

This the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extremely fast design verification. The design example in this version has been updated to reflect the new focus on the design methodology-This is the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extr