基于FPGA的Turbo译码算法的实现

Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)

用Hspice实现一个三输入异或门，并分析其功耗和延时。(A three input XOR gate is implemented by Hspice, and its power consumption and delay are analyzed.)

FPGA-based high-speed image acquisition system

4位的booth算法加法器，对计算机组成原理的学习有帮助，verilog语言编写(4-bit adder booth algorithm, the learning of computer organization help, verilog language)

说明：  FPGA做波形发生器，产生8种波形，包括三角波，正弦波，锯齿波，方波等。(FPGA is used as waveform generator,Generate 8 waveforms, including triangle, sine, sawtooth, square, etc.)

基于FPGA的AD和DA设计代码及文档(Design code and document of AD and DA based on FPGA)

vhdl golden reference guide

基于BCD码的十进制ALU设计，可实现加减乘除的功能(BCD to decimal ALU based design can achieve the arithmetic function)

说明：  pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)

ldpc编码器ru算法的verilog语言的完整实现，希望对您有用(ldpc encoder, RU, VERILOG，altera)