and@mms

Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.

是用VHDL写的一个常用的ALARM BUFFER,相信对电子设计的朋友有所帮助~-VHDL is a commonly used written ALARM BUFFER, believe that the design of electronic Friend help ~

JAVA Cram Bible Sun Certified Programmer for the Java 2 Platform

SystemC is a set of C++ classes and macros which provide an event-driven simulation kernel in C++ (see also discrete event simulation). SystemC makes it possible to simulate concurrent processes, each described using plain C++ syntax. SystemC processes can communicate in a simulated real-time environment, using signals of all the datatypes offered by C++,

《Visual C++网络通信编程实用案例精选》的配套源代码。- Visual C++ Network communications programming practical case selection of matching the source code.

华为内部资料-硬件工程师手册。希望大家有用。-Huawei internal information-hardware engineers manual. We hope useful.

自己写的LTE中turbo编码仿真。符合3GPP标准，能够直接运行。相应的文档见3GPP 36.212-Write your own LTE simulation of turbo codes. In line with 3GPP standards, can be run directly. The appropriate documentation, see 3GPP 36.212

使用时先将文件名改为PDF格式就可以打开了，文章是复位电路。-File name to use when first read PDF format can be opened up, the article is a reset circuit.

A client/server application that implements the game of BINGO. This example broadcasts information via a multicast socket, builds its GUI with Swing components, uses multiple synchronous threads, and communicates with RMI.

Oracle操作完全操作迷你手册-Oracle fully operational mini manual