Vhdl 语言设计的 16 根 4 点 FFT

按键消抖，对时钟沿计数决定是否将bin值给内部的按键值。(Debounced buttons, whether on the edge of the clock count within the bin value to the key value.)

基于FPGA的16QAM调制器设计与实现(Design and implementation of 16QAM modulator based on FPGA)

vga interface with text rom. font size 80x40. core need core regeneration.

3 Digit BCD to 7 segment indicator decoder

qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)

Quatus下用Verilog语言编写的双向交通灯控制系统，内含程序及波形图，注释详细，课程设计(Verilog language Quatus two-way traffic light control system, containing program and waveforms, detailed annotations, curriculum design)

AHB_Lite 通信协议的FPGA Verilog 设计(AHB_Lite communication protocol Verilog design in FPGA)

these files are written in verilog but i am uploading in text format

使用 System view 编程 QPSK(use System Programming view QPSK)

4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good