关于液晶显示模块和键盘电路设计的资料，对于电子初学者是有很大的帮助...

IC卡电子锁,单片机开发，电子锁，嵌入式-IC card electronic lock, microcontroller development, electronic lock, embedded

myson mtv230-car tft 最新源程序-myson mtv230-car tft latest source

at89c51+isp1581控制程序(c语言源代码).包含快速模式和高速模式-at89c51+ isp1581 control procedures (c language source code). contains fast mode and high-speed mode

文中介绍基于嵌入式处理器S3C2440A 构建的视频系统,包括硬件体系结构和软件系统及其Linux 驱动程序的设计流程。提出嵌入式视频系统的一般设计方法,满足目前嵌入式系统中对视频系统的多方面需求。-In this paper, based on the embedded processor S3C2440A build video systems, including hardware architecture and software system and its Linux driver design process. Embedded video system to the general design methodology, embedded systems meet the current video system for multi-faceted needs.

freeway合作嵌入平台开发IC_图纸-freeway embedded platform development cooperation IC_ drawings

BBC 将P2P 引入电视技术-BBC television will introduce P2P technology

关于使用systemc语言进行建模的内容-Systemc language modeling on the use of the contents of

1、 对一个等边三角形，每条边按照Koch曲线的方式进行迭代，产生的分形图称为Koch雪花。编制程序绘制出它的图形，并计算Koch雪花的面积，以及它的分形维数。 2、 自己构造生成元（要有创意），按照图形迭代的方式产生分形图，用计算机编制程序绘制出它的图形，并计算其分形维数。主要用MATLAB编程 -1, for an equilateral triangle, each side in accordance with Koch curve iterative manner, the resulting figure is called Koch snowflake fractal. Programmed to map out its graphics, and calculate the area of Koch snowflake, and its fractal dimension. 2, construct their own generators (the need for creativity), according to the way graphics iterative produce fractal images, using a computer programmed to map out its graphics, and calculate its fractal dimension.using MATLAB

本文：采用了FPGA方法来模拟高动态(Global Position System GPS)信号源中的C／A码产生器。C／A码在GPS中实现分址、卫星信号粗捕和精码(P码)引导捕获起着重要的作用，通过硬件描述语言VERILOG在ISE中实现电路生成，采用MODELSIM、SYNPLIFY工具分别进行仿真和综合。-This article: FPGA method used to simulate the high dynamic (Global Position System GPS) signal source of the C/A code generator. C/A code in GPS to achieve sub-sites, the satellite signal capture coarse and fine code (P code) lead capture plays an important role, through hardware description language Verilog in ISE to achieve circuit to generate, using MODELSIM, SYNPLIFY simulation tools were and integrated.